Semiconductor memory devices used for storing binary data are typically classified as volatile or nonvolatile semiconductor memory devices. Volatile semiconductor memories may lose their data if electric power thereto is turned off, while nonvolatile semiconductor memories may maintain their data even if electric power is turned off. SRAMs (static random access memories) and DRAMs (dynamic random access memories) are typical kinds of volatile semiconductor memories, while flash memories are typical nonvolatile semiconductor memories.
SRAM memory devices may have high reading and writing speeds and low power consumption. However, SRAM devices may be disadvantageous for high levels of integration, because an SRAM unit cell may include six transistors. The DRAM unit cell may be smaller than the SRAM unit cell in area, because a DRAM cell may include only one transistor and one capacitor.
Since a flash memory device may have a unit cell that is similar to a MOS transistor without a data storage element like the capacitor of a DRAM cell, the level of integration of flash memory devices can be relatively high. Depending on the structural features of their cells, flash memory devices can be classified as floating-gate or floating-trap type flash memory devices. A floating-gate flash memory device has floating gates isolated with insulation films between a semiconductor substrate and word lines. Data is stored in a floating-gate flash memory device by injecting electric charges into the floating gates. Floating-trap flash memory devices store data by injecting electric charges into trap sites formed within non-conductive charge-trapping layers between word lines and the semiconductor substrate.
A general structure of flash memory device is shown in FIG. 1.
Referring to FIG. 1, bit lines BL for connection to a peripheral circuit or an external power supply are arranged on a semiconductor substrate 1. Word lines WL are arranged on the substrate 1, perpendicular to and crossing the bit lines BL. Memory cells M are positioned in the regions in which the bit lines BL and word lines WL cross each other. The word lines WL correspond to gate electrodes of transistors constituting the memory cells, and memory layers (not shown) are formed between the word lines WL and the semiconductor substrate 1. In a floating-trap flash memory device, the memory layer includes a tunnel insulation film, a charge trapping film, and a blocking insulation film. The charge-trapping film includes a trapping level in which electric charges can be captured. In storing or erasing data, electric charges are injected into or emitted from a specific cell by supplying appropriate voltages to the corresponding word line WL and bit line BL of the cell.
In FIG. 1, the symbol ‘F’, which is the minimum obtainable feature size, defines the width of the word lines WL and the bit lines BL, and also the interval between the adjacent word lines and/or the adjacent bit lines. Thus, a unit cell M occupies an area of dimension 4F2. Such a feature size may be less than that of an SRAM or DRAM cell. On the other hand, there are some kinds of flash memories that may have a feature size of up to 6F2 or 10F2.